The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2025
Filed:
Mar. 30, 2023
Texas Instruments Incorporated, Dallas, TX (US);
Orlando Lazaro, Cary, NC (US);
John Russell Broze, Dallas, TX (US);
Timothy Bryan Merkin, Princeton, TX (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
Biasing an isolation region in a semiconductor substrate. An integrated circuit includes a semiconductor substrate, a first rectifying device, and a second rectifying device. The semiconductor substrate has a first region, a second region, and a third region each being an opposite conductivity type from the semiconductor substrate. The first region and the second region are respective current terminals of a transistor. The first rectifying device has a first positive terminal and a first negative terminal. The first positive terminal is coupled to the first region, and the first negative terminal is coupled to the third region. The second rectifying device has a second positive terminal and a second negative terminal. The second positive terminal is coupled to a ground terminal, and the second negative terminal is coupled to the third region.