The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

May. 30, 2025
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Takaaki Yamanaka, Kyoto, JP;

Yuki Nakano, Kyoto, JP;

Kenji Yamamoto, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 64/23 (2025.01); H01L 21/04 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H10D 8/01 (2025.01); H10D 8/60 (2025.01); H10D 62/832 (2025.01); H10D 64/64 (2025.01);
U.S. Cl.
CPC ...
H10D 64/23 (2025.01); H01L 21/0475 (2013.01); H01L 21/0495 (2013.01); H01L 23/3121 (2013.01); H01L 23/3675 (2013.01); H10D 8/051 (2025.01); H10D 8/60 (2025.01); H10D 62/8325 (2025.01); H10D 64/64 (2025.01);
Abstract

A semiconductor device includes a chip, an electrode that is formed on the chip, an inorganic insulating layer that covers the electrode and has a first opening exposing the electrode, an organic insulating layer that covers the inorganic insulating layer, has a second opening surrounding the first opening at an interval from the first opening, and exposes an inner peripheral edge of the inorganic insulating layer in a region between the first opening and the second opening, and an Ni plating layer that covers the electrode inside the first opening and covers the inner peripheral edge of the inorganic insulating layer inside the second opening.


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