The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

Feb. 08, 2023
Applicant:

National Yang Ming Chiao Tung University, Hsinchu, TW;

Inventors:

Bing-Yue Tsui, Hsinchu, TW;

Li-Tien Hsueh, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 30/66 (2025.01); H10D 30/01 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 30/668 (2025.01); H10D 30/0297 (2025.01); H10D 64/513 (2025.01); H10D 64/516 (2025.01);
Abstract

A gate fabrication method of an UMOSFET and a trench gate structure formed thereof are provided, comprising providing a transistor structure and a lithography process is employed to define a trench region. A gate oxide layer is deposited along the trench and two polysilicon sidewalls having a spacing there in between are formed afterwards. A wet etching is used to remove the gate oxide layer underneath the polysilicon sidewalls such that a vacancy is formed at the trench bottom. By oxidizing the polysilicon sidewalls, a thick oxide layer is formed, enfolding periphery of the polysilicon sidewalls and filling the vacancy. The spacing can be alternatively retained between the polysilicon sidewalls covered with the thick oxide layer, such that the trench can be alternatively filled. The present invention is effective in increasing oxide thickness of the gate bottom, reducing the trench corner curvature as well as the feedback capacitance.


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