The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 23, 2025

Filed:

Jun. 12, 2025
Applicant:

Next Silicon Ltd, Givatayim, IL;

Inventors:

Elad Raz, Ramat Gan, IL;

Dan Shechter, Tel Aviv, IL (US);

Assignee:

Next Silicon Ltd, Givatayim, IL;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 9/30 (2018.01); G06F 12/0875 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0875 (2013.01); G06F 9/3004 (2013.01); G06F 2212/452 (2013.01);
Abstract

A system for managing cache coherency comprises memory areas, processing cores, cache nodes each associated with at least one of the processing cores, and a hardware processor configured to: for each of the memory areas: cluster the processing cores into clusters according to memory access metrics in relation to the memory area; and for each of the clusters, associate the memory area with a caching scheme; and configure the processing cores to: receive from a first core a memory access command comprising a memory address associated with a memory area, where the first core is a member of a first cluster for the memory area; compute a determination of a target cache node according to the memory access command, where the target cache node is associated with a second core; and access the memory area according to the caching scheme associated with the memory area for the first cluster.


Find Patent Forward Citations

Loading…