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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12501784 B1

PDFFull Text
Date of Patent:
Dec. 16, 2025

Filed:

Feb. 14, 2023

Display device, method of fabricating the same

Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Jae Sik Kim, Yongin-si, KR;

Woo Yong Sung, Yongin-si, KR;

Jeong Seok Lee, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:

Womble Bond Dickinson (US) LLP

Primary Examiner:

Victoria K Hall

Int. Cl.
CPC ...
H10K 59/122 (2023.01); H10K 50/15 (2023.01); H10K 50/16 (2023.01); H10K 50/81 (2023.01); H10K 50/822 (2023.01); H10K 50/844 (2023.01); H10K 59/12 (2023.01); H10K 59/123 (2023.01); H10K 59/35 (2023.01); H10K 59/80 (2023.01); H10K 71/00 (2023.01); H10K 71/60 (2023.01); H10K 59/131 (2023.01); H10K 102/00 (2023.01);
U.S. Cl.
CPC ...
H10K 59/122 (2023.02); H10K 50/15 (2023.02); H10K 50/16 (2023.02); H10K 50/81 (2023.02); H10K 50/822 (2023.02); H10K 50/844 (2023.02); H10K 59/1201 (2023.02); H10K 59/123 (2023.02); H10K 59/80522 (2023.02); H10K 59/8723 (2023.02); H10K 59/873 (2023.02); H10K 71/00 (2023.02); H10K 71/60 (2023.02); H10K 59/131 (2023.02); H10K 59/353 (2023.02); H10K 2102/341 (2023.02); H10K 2102/351 (2023.02);
Abstract

A display device and a method for fabricating the same are provided, the display device including a substrate including emission areas for displaying images, and a non-emission area between the emission areas, anode electrodes above the substrate and respectively in the emission areas, a bank buffer layer above the substrate in the non-emission area and covering edges of the anode electrodes, a first multi-layer above the bank buffer layer, including a stack of two or more different metal materials, and including an undercut structure, a pixel-defining layer above the first multi-layer, a second multi-layer above the pixel-defining layer, including a stack of two or more different metal materials, and including an undercut structure, and a spacer above the second multi-layer.

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