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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12501686 B1

PDFFull Text
Date of Patent:
Dec. 16, 2025

Filed:

Mar. 10, 2023

Semiconductor device with capping layer

Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Tse-Yao Huang, Taipei, TW;

Assignee:

NANYA TECHNOLOGY CORPORATION, New Taipei, TW;

Attorney:

Xuan Zhang

Primary Examiner:

Erik Kielin

Int. Cl.
CPC ...
H10D 64/66 (2025.01); H01L 21/28 (2025.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/532 (2006.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 64/66 (2025.01); H01L 21/28035 (2013.01); H01L 21/28061 (2013.01); H01L 21/2807 (2013.01); H01L 21/28525 (2013.01); H01L 21/28568 (2013.01); H01L 21/76834 (2013.01); H01L 21/76877 (2013.01); H01L 23/291 (2013.01); H01L 23/3178 (2013.01); H01L 23/53271 (2013.01); H01L 23/5329 (2013.01); H10D 64/01 (2025.01); H10D 64/661 (2025.01); H10D 64/664 (2025.01); H01L 21/76802 (2013.01); H01L 23/53276 (2013.01); H10D 64/513 (2025.01);
Abstract

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a capping mask layer positioned on the substrate; a first gate insulating layer positioned along the capping mask layer, inwardly positioned in the substrate, and including a U-shaped cross-sectional profile; a first work function layer positioned on the first gate insulating layer; a first conductive layer positioned on the first work function layer; and a first capping layer positioned on the first conductive layer. The first capping layer includes germanium oxide. A top surface of the first capping layer and a top surface of the capping mask layer are substantially coplanar.

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