The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Sep. 09, 2022
Applicant:

Silicon-magic Semiconductor Technology (Hangzhou) Co., Ltd., Hangzhou, CN;

Inventors:

Xiao Yang, Hangzhou, CN;

Hui Chen, Hangzhou, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/17 (2025.01); H10D 30/66 (2025.01); H10D 62/13 (2025.01); H10D 62/832 (2025.01); H10D 64/23 (2025.01);
U.S. Cl.
CPC ...
H10D 62/393 (2025.01); H10D 30/66 (2025.01); H10D 62/154 (2025.01); H10D 62/8325 (2025.01); H10D 64/252 (2025.01); H10D 64/258 (2025.01);
Abstract

A silicon carbide power semiconductor device is provided, including a substrate, a drift region, a body region, a source region, a base region, a shielding region, a JFET region, a gate structure, an insulating layer, and a source metal layer. The source contacting window has first edges within second edges of the body region corresponding to the first edges, and the source metal layer abuts only a part of the source region. The area of the silicon carbide power semiconductor device of the present disclosure is thus reduced. Therefore, the ratio of the channel length to the area of the silicon carbide power semiconductor device and the ratio of the area of the JFET region to the area of the silicon carbide power semiconductor device are increased, whereby the specific on-resistance of the silicon carbide power semiconductor device is reduced.


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