The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Mar. 24, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyeran Lee, Suwon-si, KR;

Kiseok Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H10D 1/68 (2025.01);
U.S. Cl.
CPC ...
H10B 12/315 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02); H10B 12/50 (2023.02); H10D 1/716 (2025.01);
Abstract

A semiconductor memory includes a substrate having a plurality of active regions, a plurality of word lines formed in the substrate and disposed in a plurality of word line trenches extending in a first direction, a plurality of cell pad patterns on the plurality of active regions, a plurality of bit line structures formed on the substrate and extending in a second direction perpendicular to the first direction, and a plurality of isolation insulating patterns filling at least a portion of a plurality of isolation trenches extending between the plurality of cell pad patterns in the second direction, wherein each of the plurality of isolation insulating patterns includes an isolation insulating line portion and an isolation insulating spacer portion connected to each other and forming an integral body. The isolation insulating line portion and the isolation insulating spacer portion being disposed in alternating ones of the plurality of isolation trenches and extend in the second direction.


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