Abstraction of compute nodes and accelerators in a switched cxl interconnect

Abstract

Embodiments for communicating using a switch having multiple sets of switch ports, which can generate abstractions for compute nodes and accelerators in a switched Compute Express Link (CXL) interconnect, enabling any-to-any connectivity between hosts and devices. A first set of switch ports couples hosts and/or devices with a first virtual to physical binding. A second set couples a Resource Provisioning Unit (RPU) with the first virtual to physical binding. The first binding binds at least some of the first and/or second sets of switch ports to a first set of Virtual CXL Switches (VCSs). A third set couples the RPU to a second virtual to physical binding. A fourth set couples additional hosts and/or devices with the second virtual to physical binding. And the second virtual to physical binding binds at least some of the third and/or fourth sets of switch ports to a second set of VCSs.