The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Nov. 22, 2023
The Industry & Academic Cooperation IN Chungnam National University, Daejeon, KR;
Young-Kyun Cho, Daejeon, KR;
Abstract
Proposed is a technology related to a compensation method for excess loop delay (ELD) using a time division switching (TDS) technique. A delta-sigma modulator (DSM) to which the compensation method for excess loop delay is applied includes a single op-amp resonator (SOR) loop filter. The loop filter includes an operational amplifier, a plurality of capacitors connected to each other in series between an input terminal and an output terminal of the operational amplifier, and a plurality of resistor units connected in common to one among nodes between the plurality of capacitors. For at least two of the plurality of resistor units, a resistance value of each of the at least two resistor units is changed according to a clock signal, and a coefficient of a third-order transfer function of the loop filter is changed according to the clock signal, thereby effectively compensating for excess loop delay of the delta-sigma modulator.