The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Jul. 25, 2024
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Aadilhussain Maniyar, Reading, GB;
Peter J. Tonge, Hampshire, GB;
Rohit Tomar, Edinburgh, GB;
Robert J. Hatfield, Edinburgh, GB;
Cirrus Logic Inc., Austin, TX (US);
Abstract
Circuitry for processing an input signal from a sensor, the circuitry comprising: an input configured to receive the input signal; bias circuitry configured to apply a bias to the input signal to obtain a biased input signal; a gain stage configured to apply a gain to the biased input signal to obtain an amplified input signal; an analog-to-digital converter (ADC) configured to convert the amplified input signal to a digital output signal; wherein, during a calibration phase, the control circuitry is configured to: control the bias circuitry to apply a macro offset to the input signal, the macro offset to bring the amplified input signal within a dynamic range of the ADC; and determine a micro offset to be applied during a measurement phase of the sensor based on the macro offset and the digital output signal; and wherein during the measurement phase, the control circuitry is configured to control the bias circuitry to disable application of the macro offset and apply the micro offset to the input signal, the macro offset having a greater magnitude than the micro offset.