The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Aug. 31, 2022
Applicant:

Nuvoton Technology Corporation, Hsinchu, TW;

Inventors:

Benny Shatit, Hsinchu Science Park, TW;

Ming-Che Hung, Hsinchu, TW;

Tsung-Hsueh Li, Yunlin County, TW;

Uri Trichter, Hsinchu Science Park, TW;

Dan Morav, Hsinchu Science Park, TW;

Assignee:

NUVOTON TECHNOLOGY CORPORATION, Hsinchu Science Park, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/14 (2006.01); G06F 1/30 (2006.01); G06F 21/55 (2013.01); G06F 21/87 (2013.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01); H03K 3/84 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49513 (2013.01); G06F 1/14 (2013.01); G06F 1/30 (2013.01); G06F 21/554 (2013.01); G06F 21/87 (2013.01); H01L 23/3107 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H03K 3/84 (2013.01); G06F 2221/034 (2013.01); H01L 24/45 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/45144 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/0665 (2013.01);
Abstract

An embodiment of an IC is provided. The IC includes a memory, a controller, an intrusion detector and a memory clear circuit. The memory is configured to store sensitive data. The controller is configured to access the memory. The intrusion detector is configured to detect whether an intrusion event is present in response to an input signal. The memory clear circuit is configured to clear the sensitive data of the memory when the intrusion detector detects the intrusion event.


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