The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Dec. 04, 2024
Applicant:

Xiamen Tianma Display Technology Co., Ltd., Xiamen, CN;

Inventors:

Jiro Yanase, Kanagawa, JP;

Masamichi Shimoda, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/3233 (2016.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3233 (2013.01); G11C 19/28 (2013.01); G09G 2300/0814 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0693 (2013.01);
Abstract

Shift registers output high-level pulses each having a length of two or more horizontal periods one after another with a transfer step of one horizontal period. The shift register is controlled by a first clock signal and a second clock signal in m phases of clock signals. The shift register includes a high-level output thin-film transistor, a low-level output thin-film transistor and a buffer thin-film transistor. The buffer thin-film transistor receives a control signal having a pulse width and a cycle same as the first clock signal in a period where an output terminal is outputting a low-level potential. High-duties of the first clock signal and the second clock signal are expressed as PW/mH, where PW represents pulse widths of the first clock signal and the second clock signal and H represents one horizontal period. On-duties of all the thin-film transistors are not more than PW/mH.


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