The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Nov. 16, 2021
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Zhenhua Zhang, Beijing, CN;

Yingsong Xu, Beijing, CN;

Jingyi Feng, Beijing, CN;

Changlong Yuan, Beijing, CN;

Xilei Cao, Beijing, CN;

Yao Hu, Beijing, CN;

Guoqiang Tang, Beijing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); H10K 59/131 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); H10K 59/131 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0465 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01);
Abstract

The present application relates to the technical field of displays. Provided are a display panel and a display apparatus. The display panel comprises a first pixel driving circuit, wherein the first pixel driving circuit comprises a low-temperature polysilicon transistor and an oxide transistor. The display panel further comprises: a base substrate, a first conductive layer and a third conductive layer, wherein the first conductive layer comprises a first gate line, and part of the structure of the first gate line is used for forming a gate electrode of the low-temperature polysilicon transistor; the third conductive layer comprises a second gate line, and part of the structure of the second gate line is used for forming a gate electrode of the oxide transistor; and the orthographic projection of the first gate line on the base substrate extends in a first direction.


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