The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
May. 22, 2023
Xilinx, Inc., San Jose, CA (US);
Ahmad R. Ansari, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
An integrated circuit (IC) device includes functional circuitry and distributed management circuitry that includes multiple configuration interface manager (CIM) circuits that receive respective programming partitions as configuration packets over a first communication channel (e.g., a network-on-chip, or NoC), and perform management operations on respective regions of the functional circuitry in parallel with one another based on the respective configuration packets, including providing configuration parameters to the respective regions of the functional circuitry. The configuration packets may be streamed to the CIM circuits from a central manager and/or read by direct memory access (DMA) engines of the CIM circuits. The central manager may configure the CIM circuits and the NoC over a second communication channel (e.g., a global communication ring interconnect) during an initialization phase. The CIM circuits may include respective packet processors, random-access-memory, authentication circuitry, error detection circuitry, and interconnect circuitry having standardized bus-widths.