The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Mar. 10, 2022
Nvidia Corporation, Santa Clara, CA (US);
Alexander L. Minkin, Santa Clara, CA (US);
Alan Kaatz, Santa Clara, CA (US);
Olivier Giroux, Santa Clara, CA (US);
Jack Choquette, Santa Clara, CA (US);
Shirish Gadre, Santa Clara, CA (US);
Manan Patel, Santa Clara, CA (US);
John Tran, Santa Clara, CA (US);
Ronny Krashinsky, Santa Clara, CA (US);
Jeff Schottmiller, Santa Clara, CA (US);
NVIDIA Corporation, Santa Clara, CA (US);
Abstract
A parallel processing unit comprises a plurality of processors each being coupled to a memory access hardware circuitry. Each memory access hardware circuitry is configured to receive, from the coupled processor, a memory access request specifying a coordinate of a multidimensional data structure, wherein the memory access hardware circuit is one of a plurality of memory access circuitry each coupled to a respective one of the processors; and, in response to the memory access request, translate the coordinate of the multidimensional data structure into plural memory addresses for the multidimensional data structure and using the plural memory addresses, asynchronously transfer at least a portion of the multidimensional data structure for processing by at least the coupled processor. The memory locations may be in the shared memory of the coupled processor and/or an external memory.