The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 2025

Filed:

Dec. 22, 2023
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Angel E. Socarras, Orlando, FL (US);

Vivek Oppula, Austin, TX (US);

Benoit M. Jubelin, Austin, TX (US);

Gus P. Ikonomopoulos, Lakeway, TX (US);

Jason P. Jane, Morgan Hill, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3296 (2019.01); G06F 1/3228 (2019.01); G06F 1/3234 (2019.01); G06F 1/324 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3296 (2013.01); G06F 1/3228 (2013.01); G06F 1/324 (2013.01); G06F 1/3275 (2013.01);
Abstract

Techniques are disclosed relating to power control and voltage margining. In some embodiments, first and second component circuits operate based on a supply voltage generated by a power supply. Voltage sensor circuitry may generate voltage measurements. Voltage margin control circuitry may determine a voltage ceiling based on a current operating state of the first component circuit and a current operating state of the second component circuit. The control circuitry may transmit control signals to the power supply to incrementally reduce the supply voltage until detecting a low-supply-voltage condition based on a voltage measurement generated by the voltage sensor circuitry. Disclosed techniques may advantageously provide voltage margin while reducing overall power consumption.


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