The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

Nov. 18, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Chankyo Park, Suwon-si, KR;

Seungchul Oh, Suwon-si, KR;

Jaeho Jeon, Suwon-si, KR;

Sunggi Hur, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/775 (2006.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 64/017 (2025.01); H10D 30/014 (2025.01); H10D 30/031 (2025.01); H10D 30/43 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01);
Abstract

A method of manufacturing a semiconductor device is provided. The method includes: forming, on a substrate, dummy gate structures extending in a first direction, spaced apart from one another along a second direction, forming a first oxide layer on the dummy gate structures, etching an upper portion of the first oxide layer and the dummy gate to form a recess region, providing a first nitride layer in the recessed region, forming a second oxide layer on the first nitride layer and the first oxide layer, partially removing upper portions of the first oxide layer and the second oxide layer and providing a second nitride layer on the first and second oxide layers.


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