Qam demodulator having recursive structure

Abstract

A QAM demodulator including a first calculation circuit including a real part returning circuit and an imaginary part returning circuit that derive, from a first complex symbol, an in phase (I) component and a quadrature phase (Q) component, respectively; first and second comparators for receiving the I and Q components, and based thereon, outputting respective bits of a bit string; first and second absolute value returning circuits that derive absolute values of the I and Q components ('abs(I)' and “abs(Q)”); first and second summers to sum each of abs(I) and abs(Q) with a first reference value and thereby provide first and second summed outputs; and a sub-QAM demodulator configured to QAM demodulate a second complex symbol and thereby output corresponding bits. I and Q components of the second complex symbol are based on the first and second summed outputs. The corresponding bits are remaining bits of the bit stream.