The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

Dec. 22, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Ivan Nikitin, Regensburg, DE;

Peter Luniewski, Poing, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01R 12/58 (2011.01); H01R 33/22 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 21/4853 (2013.01); H01L 21/486 (2013.01); H01L 21/565 (2013.01); H01L 23/3171 (2013.01); H01L 23/49833 (2013.01); H01L 23/49844 (2013.01); H01R 12/585 (2013.01); H01R 33/225 (2013.01); H01L 23/49861 (2013.01); H01L 2924/181 (2013.01);
Abstract

A method of forming a semiconductor device includes providing a power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, mounting one or more semiconductor dies on a portion of the structured metallization layer, forming an encapsulant body of electrically insulating material that covers the power electronics carrier and encapsulates the one or more semiconductor dies, securing a press-fit connector to the power electronics carrier with a base portion of the press-fit connector being disposed within an opening in the encapsulant body and with an interfacing end of the press-fit connector being electrically accessible from outside the encapsulant body.


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