The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 2025

Filed:

Jul. 17, 2023
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Huiwen Xu, Cupertino, CA (US);

Bo Lei, San Jose, CA (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/08 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 16/08 (2013.01); G11C 16/3445 (2013.01);
Abstract

The adaptive erase scheme includes erasing the memory cells of a selected memory block in at least one erase loop. During the at least one erase loop, simultaneously, an erase voltage is applied to a plurality of channels in the selected memory block, a first bias voltage is applied to the plurality of word lines of the first sub-block, and a second bias voltage is applied to the plurality of word lines of the second sub-block. The first bias voltage is different than the second bias voltage so that the memory cells of the first and second sub-blocks are erased at different speeds.


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