The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2025

Filed:

Nov. 19, 2019
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Shogo Furuya, Kanagawa, JP;

Yorito Sakano, Kanagawa, JP;

Ryo Takahashi, Kumamoto, JP;

Atsushi Suzuki, Kumamoto, JP;

Ryoichi Yoshikawa, Kumamoto, JP;

Jun Suenaga, Kumamoto, JP;

Shinichi Koga, Kumamoto, JP;

Yohei Chiba, Kumamoto, JP;

Tadamasa Shioyama, Kumamoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01); H10F 39/18 (2025.01);
U.S. Cl.
CPC ...
H10F 39/8023 (2025.01); H10F 39/18 (2025.01); H10F 39/811 (2025.01); H10F 39/014 (2025.01); H10F 39/8053 (2025.01); H10F 39/8057 (2025.01);
Abstract

There is provided a solid-state imaging device having a configuration suitable for high integration. The solid-state imaging device includes a semiconductor layer, a photoelectric converter, a storage capacitor, and a first transistor. The photoelectric converter is provided in the semiconductor layer, and generates an electric charge corresponding to a received light amount by photoelectric conversion. The storage capacitor is provided on the semiconductor layer, and includes a first insulating film having a first electrical film thickness. The first transistor is provided on the semiconductor layer, and includes a second insulating film having a second electrical film thickness larger than the first electrical film thickness.


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