The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2025

Filed:

May. 28, 2024
Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Minjoo Kim, Yongin-si, KR;

Minwoo Byun, Yongin-si, KR;

Kyonghwan Oh, Yongin-si, KR;

Yang-Hwa Choi, Yongin-si, KR;

Donghwan Jeon, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/3266 (2016.01); G11C 19/28 (2006.01); H03K 3/012 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G09G 3/3266 (2013.01); G11C 19/28 (2013.01); H03K 3/012 (2013.01); G09G 2310/0267 (2013.01); G09G 2330/021 (2013.01);
Abstract

A gate driver includes a plurality of stages. At least one of the stages includes a control circuit configured to control a first control node in response to a first carry clock signal, a node separation transistor connected between the first control node and a second control node, a carry output circuit configured to output a carry signal in response to a voltage of the second control node, and a plurality of gate output circuits configured to output a plurality of gate signals having different timings in response to the voltage of the second control node.


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