The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

Nov. 28, 2022
Applicant:

Siemens Aktiengesellschaft, Munich, DE;

Inventors:

Markus Lasch, Munich, DE;

Roland Lorz, Röttenbach, DE;

Markus Pfeifer, Nuremberg, DE;

Stefan Stegmeier, Munich, DE;

Erik Weisbrod, Munich, DE;

Ronny Werner, Nuremberg, DE;

Felix Zeyss, Erlangen, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H05K 1/05 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49844 (2013.01); H05K 1/053 (2013.01); H05K 2201/098 (2013.01); H05K 2201/10022 (2013.01);
Abstract

An arrangement for a semiconductor arrangement includes a substrate including a dielectric material layer and a first metallization arranged on the dielectric material layer. A passive component is arranged completely in a cutout of the first metallization and bears directly on the dielectric material layer. The passive component is designed to include a first profile. The the first metallization includes a second profile in a region of contacting with the passive component, with the first and second profiles engaging with one another.


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