The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

May. 08, 2023
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Koichi Takeda, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/16 (2006.01); G11C 5/08 (2006.01); G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1697 (2013.01); G11C 5/08 (2013.01); G11C 7/06 (2013.01);
Abstract

A semiconductor device capable of increasing readout margin in a nonvolatile resistive random access memory is provided. A clamping circuit applies fixed potential to each of a memory element and a reference resistive element. A pre-charge circuit pre-charges first and second nodes to power-source potential. A sense amplifier amplifies the potential difference between the potential of the first node and the potential of the second node generated after a discharge period based on cell current and reference current after pre-charging made by the pre-charge circuit. A third node is coupled to the first and second nodes through a capacitor. An electric-charge supply circuit is connected to the third node, and supplies electric charge to the third node in the discharge period.


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