The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 2025

Filed:

Nov. 15, 2023
Applicant:

SK Hynix Nand Product Solutions Corp., Rancho Cordova, CA (US);

Inventors:

Arun Athreya, Folsom, CA (US);

Yihua Zhang, Folsom, CA (US);

Shankar Natarajan, Folsom, CA (US);

Sriram Natarajan, Folsom, CA (US);

Shivashekar Muralishankar, Folsom, CA (US);

Orapin Yoder, Chandler, AZ (US);

Parth Donga, Folsom, CA (US);

Assignee:

SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 11/108 (2013.01); G06F 3/065 (2013.01); G06F 12/0246 (2013.01);
Abstract

A system and related method, the system including control circuitry and memory with a first memory block of a first memory density and a second memory block of a second memory density which is greater than the first memory density. Control circuitry, which is communicatively coupled to the memory, is configured to determine to transfer data from the first memory block to the second memory block, generate parity data based on the data and cause to store the parity data at a parity address corresponding to an available portion of the first memory block. Control circuitry is further to cause to update a look-up table with the parity data address and cause to copy the data from the first memory block to the second memory block.


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