The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Jan. 10, 2023
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Jae Man Yoon, Icheon-si, KR;

Jun Ki Kim, Icheon-si, KR;

Tae Kyun Kim, Icheon-si, KR;

Jung Woo Park, Icheon-si, KR;

Jae Won Ha, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/02 (2006.01); H01L 21/033 (2006.01); H01L 21/28 (2025.01); H01L 21/285 (2006.01); H01L 21/3205 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/02266 (2013.01); H01L 21/0337 (2013.01); H01L 21/28061 (2013.01); H01L 21/28518 (2013.01); H01L 21/28525 (2013.01); H01L 21/32053 (2013.01); H01L 21/32055 (2013.01); H01L 21/32134 (2013.01); H01L 21/32135 (2013.01); H01L 21/32139 (2013.01); H01L 21/76807 (2013.01); H01L 21/76837 (2013.01); H01L 21/76877 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes: forming a trench in an insulating interlayer by etching the insulating interlayer; forming a conductive layer on bottom, side, and upper surfaces of the insulating interlayer where the trench is formed, using a first deposition process, the conductive layer on the bottom surface of the trench being thicker than the conductive layer on the side surface of the trench; forming a sacrificial layer in the trench covering the conductive layer formed on the bottom surface of the trench using a second deposition process different from the first deposition process; selectively removing the conductive layer formed on the upper surface of the insulating interlayer and formed on the side surface of the trench left exposed through the sacrificial layer; and selectively removing the sacrificial layer, to form a conductive line using the conductive layer remaining on the bottom surface of the trench.


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