The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2025
Filed:
Mar. 27, 2023
Samsung Electronics Co., Ltd., Suwon-si, KR;
Ho Young Tang, Suwon-si, KR;
Tae-Hyung Kim, Suwon-si, KR;
Dae Young Moon, Suwon-si, KR;
Sang-Yeop Baeck, Suwon-si, KR;
Dong-Wook Seo, Suwon-si, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
Provided are a three-dimensional (3D) semiconductor integrated circuit and a static random access memory (SRAM) device. The three-dimensional (3D) semiconductor integrated circuit includes: a first die including a power supply circuit a second die including an SRAM with a through-silicon-via (TSV) bundle region; a third die including a processor; and TSVs, each of which is provided on the TSV bundle region and extends from the TSV bundle region to the third die. The SRAM device includes: a bank array with banks, each of which includes sub-bit-cell arrays and a local peripheral circuit region arranged in a cross (+) shape between the sub-bit-cell arrays; and a global peripheral circuit region including a tail peripheral circuit region extending in a first direction and a head peripheral circuit region extending in a second direction, the tail peripheral circuit region and the head peripheral circuit region being arranged in a 'T' shape.