The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Jan. 27, 2023
Applicant:

Psemi Corporation, San Diego, CA (US);

Inventor:

Rogelio Cicili, San Diego, CA (US);

Assignee:

pSemi Corporation, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/22 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45188 (2013.01); H03F 1/223 (2013.01); H03F 3/45273 (2013.01);
Abstract

Methods and devices for a cascode differential input pair with low headroom voltage and high output impedance are presented. The cascode differential input pair includes first and second input (cascode) stages, each including a common-source regular transistor in series connection with a common-gate intrinsic transistor. Sources of the regular transistors are tied, and gates of the intrinsic transistors are tied. A gate voltage to the intrinsic transistors is provided by a source voltage at the sources of the regular transistors, the source voltage based on a common mode input voltage of the cascode differential input pair. According to one aspect, the cascode differential input pair is part of a differential amplifier that includes a current source coupled to the sources of the regular transistors, and a load coupled to drains of the intrinsic transistors.


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