The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2025
Filed:
Oct. 17, 2023
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); G06T 7/00 (2017.01); G06T 7/70 (2017.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/68 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); G06T 7/0004 (2013.01); G06T 7/70 (2017.01); H01L 21/4825 (2013.01); H01L 21/4842 (2013.01); H01L 21/565 (2013.01); H01L 21/681 (2013.01); H01L 23/3114 (2013.01); H01L 23/49513 (2013.01); H01L 23/4952 (2013.01); H01L 23/49541 (2013.01); H01L 23/49582 (2013.01); G06T 2207/30148 (2013.01);
Abstract
A semiconductor package includes a metallic pad and leads spaced from the metallic pad by a gap, the metallic pad including a roughened surface. The semiconductor package further includes a semiconductor die including bond pads, and an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad, wherein the adhesive includes a resin. The metallic pad further includes a groove surrounding the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic pad.