logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12475955 B1

PDFFull Text
Date of Patent:
Nov. 18, 2025

Filed:

Jun. 16, 2023

Memory device

Applicant:

Kioxia Corporation, Tokyo, JP;

Inventor:

Hiroshi Maejima, Tokyo, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:

Holtz, Holtz & Volek PC

Primary Examiner:

Amir Zarabian

Assistant Examiner:

Justin Bryce Heisterkamp

Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01); H10B 41/50 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); H10B 80/00 (2023.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 41/50 (2023.02); H10B 43/35 (2023.02); H10B 43/40 (2023.02); H10B 80/00 (2023.02); H01L 2224/08135 (2013.01); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01);
Abstract

According to one embodiment, a memory device includes a substrate, a memory layer, and a circuit layer. The memory layer includes first to third regions arranged in a first direction. The circuit layer includes first and second transfer regions, and first and second sense amplifier regions. The first and second transfer regions are shifted in the first direction and arranged in a second direction. In a third direction, the first sense amplifier region overlaps the first region, and the second sense amplifier region overlaps the second region. The first sense amplifier region and the first transfer region are arranged in the first direction, and the second sense amplifier region and the second transfer region are arranged in the first direction.

Find Patent Forward Citations

Loading…