Dynamic power gating using deterministic interconnect

Abstract

Various examples disclosed herein relate to deterministically controlling interconnect operations to provide dynamic power gating for a system. In an example, a microcontroller unit (MCU) is provided that includes a group of processing devices, a group of target resources, interconnect circuitry, and clock control circuitry. The interconnect circuitry connects the group of processing devices to the group of target resources. The clock control circuitry is coupled to the interconnect circuitry. The clock control circuitry is configured to identify an upcoming occurrence of a communication between a pair of devices comprised of one of the processing devices and one of the target resources, and prior to the occurrence of the communication, enable a clock associated with a path through the interconnect circuitry between the pair of devices.