The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 2025
Filed:
Sep. 24, 2024
International Business Machines Corporation, Armonk, NY (US);
Divya Kumudprakash Joshi, Hobli, IN;
Edward J. Kaminski, Jr., Wynnewood, PA (US);
Kyle Davis, Pflugerville, TX (US);
Shaun Thomas Uldrikis, Hyde Park, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A computer-implemented method, system, and computer program product for testing hardware in an environment involving a checkstop. Errors are injected into a model of a design under test (DUT), which includes a first hardware component interfaced with a second hardware component, at various states causing an occurrence of a checkstop in the first hardware component. A simulation of the model of the DUT is then performed with the injected errors for a number of cycles after the checkstop based on a quiesce time where the injected errors are suppressed. Furthermore, a post-processing script is executed to test a model of the DUT which ignores the errors of the first hardware component that were identified after the checkstop in the simulation of the model of the DUT. Any non-ignored errors from the execution of the post-processing script are detected and analyzed to determine if the second hardware component failed the test.