The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Jul. 10, 2024
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Srinivas Santosh Kumar Madugula, Visakhapatnam, IN;

Olivier Giroux, Santa Clara, CA (US);

Wishwesh Anil Gandhi, Sunnyvale, CA (US);

Michael Allen Parker, San Jose, CA (US);

Raghuram L, Bangalore, IN;

Ivan Tanasic, San Francisco, CA (US);

Manan Patel, San Jose, CA (US);

Mark Hummel, Franklin, MA (US);

Alexander L. Minkin, Los Altos, CA (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0611 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01);
Abstract

Various embodiments include techniques for performing self-synchronizing remote memory operations in a multiprocessor computing system. During a remote memory operation in the multiprocessor computing system, a source processing unit transmits multiple segments of data to a destination processing. For each segment of data, the source processing unit transmits a remote memory operation to the destination processing unit that includes associated metadata that identifies the memory location of a corresponding synchronization object. The remote memory operation along with the metadata is transmitted as a single unit to the destination processing unit. The destination processing unit splits the operation into the remote memory operation and the memory synchronization operation. As a result, the source processing unit avoids the need to perform a separate memory synchronization operation, thereby reducing inter-processor communications and increasing performance of remote memory operations.


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