The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 18, 2025

Filed:

Feb. 20, 2024
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Gary Qu Jin, Kanata, CA;

Kamran Rahbar, Kanata, CA;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 13/34 (2006.01); G01R 23/02 (2006.01); G01R 23/10 (2006.01); G01R 31/317 (2006.01); H03K 3/0231 (2006.01); H03K 21/10 (2006.01); H03K 21/40 (2006.01);
U.S. Cl.
CPC ...
G01R 23/10 (2013.01); G01R 23/02 (2013.01); G01R 31/31725 (2013.01); G01R 31/31727 (2013.01); H03K 3/0231 (2013.01); H03K 21/10 (2013.01); H03K 21/40 (2013.01);
Abstract

An apparatus includes a clock signal input, a sampling circuit, and an estimation circuit. The clock signal input receives N time measurements. A time measurement denotes a respective portion of a given cycle of a clock signal. The sampling circuit is to generate a first sampled window based upon a first time measurement and a first previous time measurement received m time measurements earlier than the first time measurement. The sampling circuit is to generate a second sampled window based upon a second time measurement and a second previous time measurement received m time measurements earlier than the second time measurement. The estimation circuit is to estimate the frequency or period of the clock signal based upon the first sampled window and the second sampled window.


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