The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Dec. 14, 2022
Applicant:

Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;

Inventors:

Chia-Hao Chang, Taipei, TW;

Jih-Wen Chou, Hsinchu, TW;

Hwi-Huang Chen, Hsinchu, TW;

Hsin-Hong Chen, Hsinchu, TW;

Yu-Jen Huang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 64/411 (2025.01); H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 64/01 (2025.01);
Abstract

The disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a base pattern including a channel region and a drain region, a first semiconductor layer on the channel region of the base pattern, and a gate structure on the first semiconductor layer. The gate structure includes a first stack disposed on the first semiconductor layer and a second stack disposed on the first stack. The first stack includes a first sidewall adjacent to the drain region and a second sidewall opposite to the first sidewall in a first direction parallel to a top surface of the base pattern. The first sidewall is at a first distance from the second stack in the first direction, and the second sidewall is at a second distance from the second stack in the first direction. The first distance is greater than the second distance.


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