The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

May. 18, 2022
Applicant:

Denso Corporation, Kariya, JP;

Inventors:

Jun Saito, Toyota, JP;

Youngshin Eum, Kariya, JP;

Keita Kataoka, Nagakute, JP;

Yusuke Yamashita, Nagakute, JP;

Yukihiko Watanabe, Nagakute, JP;

Katsuhiro Kutsuki, Nagakute, JP;

Assignee:

DENSO CORPORATION, Kariya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/66 (2025.01); H10D 62/17 (2025.01); H10D 62/832 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 30/668 (2025.01); H10D 62/393 (2025.01); H10D 62/8325 (2025.01); H10D 64/513 (2025.01);
Abstract

A switching element includes a semiconductor substrate, a gate insulating film, and a gate electrode that is disposed inside the trench. The semiconductor substrate further includes: an n-type source region, a p-type body region, an n-type drift region, a p-type first electric field reduced region, and a p-type connection region. When a permittivity of the connection region is ε (F/cm), a critical electric field strength of the connection region is Ec (V/cm), an elementary charge is e (C), an area density of p-type impurity when viewed in a plan view of the connection region located below the trench is Q (cm), Q>ε*Ec/e.


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