The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Dec. 14, 2023
Applicant:

Prophesee, Paris, FR;

Inventors:

Thomas Finateu, Veneux les Sablons, FR;

Daniel Matolin, Freital, DE;

Christoph Posch, Bad Fischau-Brunn, AT;

Assignee:

Prophesee, Paris, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/772 (2023.01); H04N 25/47 (2023.01); H04N 25/57 (2023.01); H04N 25/778 (2023.01); H04N 25/79 (2023.01); H10F 39/00 (2025.01);
U.S. Cl.
CPC ...
H04N 25/772 (2023.01); H04N 25/47 (2023.01); H04N 25/57 (2023.01); H04N 25/778 (2023.01); H04N 25/79 (2023.01); H10F 39/809 (2025.01);
Abstract

A pixel circuit is provided for use in an event sensor. In one implementation, the pixel circuit includes a photosensitive element configured to generate a current signal in response to brightness of light impinging on the photosensitive element, a first N-type transistor, a second N-type transistor, a first P-type transistor including a gate connected to a first bias voltage, a second P-type transistor including a gate connected to a second bias voltage, the second bias voltage being an adjustable DC bias voltage that is adjusted according to at least one of a sensed temperature or a fabrication process variation of the pixel circuit, and a voltage output that varies in response to the brightness of light impinging on the photosensitive element. An adjustment of the second bias voltage causes a DC level of the voltage output to shift up or down without changing the overall gain of the pixel circuit. The pixel circuit may also include one or more additional N-type transistors for increasing performance by optimizing contrast sensitivity. The pixel circuit may further include a converter, a capacitor electrically coupled to the converter, and an amplifier electrically coupled to the capacitor. Further, the pixel circuit may be implemented in a stacked wafer configuration and one or more interconnects between wafers.


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