The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Dec. 08, 2022
Applicant:

Nokia Solutions and Networks Oy, Espoo, FI;

Inventor:

Andrea Enrici, Bourg la Reine, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/173 (2006.01); H04L 45/02 (2022.01); H04L 47/12 (2022.01); H04L 47/30 (2022.01);
U.S. Cl.
CPC ...
H04L 47/12 (2013.01); H04L 45/02 (2013.01); H04L 47/30 (2013.01);
Abstract

Example embodiments disclose a method for avoiding deadlock in a network includes generating a finite state machine indicating possible routing decisions of incoming packets for a plurality of switches, analyzing the finite state machine, determining at least one memory overflow state based on the analyzing, generating at least one anti-deadlock rule in response to determining the at least one memory overflow state, and transmitting the at least one anti-deadlock rule to the plurality of switches.


Find Patent Forward Citations

Enrici, Andrea. (2025). Deadlock prevention of switch memory overflow (U.S. Patent No. 12470485). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12470485

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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