The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

May. 15, 2024
Applicant:

Microchip Technology Incorporated, Chandler, AZ (US);

Inventors:

Rapina Siva Kumar, Bengaluru, IN;

Ziyu Wang, North Vancouver, CA;

Sudheer Babu Ketana, Bangalore, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/13 (2014.01); H03K 5/131 (2014.01); H03K 5/00 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 5/131 (2013.01); H03K 2005/00058 (2013.01); H03K 19/20 (2013.01);
Abstract

A phase interpolator may include a decoding logic circuit. The decoding logic circuit may take as input an input control code and an update clock. The decoding logic circuit may generate one or more outputs which may be input to a retiming circuit. The retiming circuit may generate retimed outputs which may be input to a delay modulation circuit. The delay modulation circuit may generate a delayed clock select control signal and a delayed phase select control signal. The delayed clock select control signal and delayed phase select control signal may be input to a phase interpolator circuit and may generate an output clock based on two or more multi-phase input clocks. The delayed clock select control signal and delayed phase select control signal may eliminate overshoot and undershoot events in the output clock.


Find Patent Forward Citations

Loading…