The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 2025
Filed:
May. 01, 2024
Applicant:
Rohm Co., Ltd., Kyoto, JP;
Inventor:
Yuki Nakano, Kyoto, JP;
Assignee:
ROHM CO. LTD., Kyoto, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 8/60 (2025.01); H01L 21/02 (2006.01); H01L 21/04 (2006.01); H01L 21/28 (2025.01); H10D 8/00 (2025.01); H10D 8/01 (2025.01); H10D 12/01 (2025.01); H10D 30/01 (2025.01); H10D 30/66 (2025.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01); H10D 62/83 (2025.01); H10D 62/832 (2025.01); H10D 62/85 (2025.01); H10D 64/27 (2025.01); H10D 64/68 (2025.01); H10D 84/00 (2025.01);
U.S. Cl.
CPC ...
H01L 21/049 (2013.01); H01L 21/02164 (2013.01); H01L 21/0217 (2013.01); H01L 21/02178 (2013.01); H01L 21/02241 (2013.01); H01L 21/02255 (2013.01); H01L 21/02271 (2013.01); H01L 21/044 (2013.01); H01L 21/28008 (2013.01); H01L 21/28264 (2013.01); H10D 8/051 (2025.01); H10D 8/411 (2025.01); H10D 8/60 (2025.01); H10D 12/031 (2025.01); H10D 30/01 (2025.01); H10D 30/668 (2025.01); H10D 62/106 (2025.01); H10D 62/127 (2025.01); H10D 62/393 (2025.01); H10D 62/8303 (2025.01); H10D 62/8325 (2025.01); H10D 62/8503 (2025.01); H10D 64/513 (2025.01); H10D 64/516 (2025.01); H10D 64/685 (2025.01); H10D 64/691 (2025.01); H10D 64/693 (2025.01); H10D 84/00 (2025.01); H10D 84/146 (2025.01); H01L 2224/0603 (2013.01);
Abstract
A method for producing a semiconductor power device includes forming a gate trench from a surface of the semiconductor layer toward an inside thereof. A first insulation film is formed on the inner surface of the gate trench. The method also includes removing a part on a bottom surface of the gate trench in the first insulation film. A second insulation film having a dielectric constant higher than SiO2 is formed in such a way as to cover the bottom surface of the gate trench exposed by removing the first insulation film.