The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Dec. 04, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sang Chul Yeo, Suwon-si, KR;

Yongjin Chun, Suwon-si, KR;

Min-Cheol Kang, Suwon-si, KR;

Jaewon Yang, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 11/60 (2006.01); G06T 7/13 (2017.01); G06V 10/24 (2022.01); G06V 10/50 (2022.01); G06V 10/74 (2022.01);
U.S. Cl.
CPC ...
G06T 11/60 (2013.01); G06T 7/13 (2017.01); G06V 10/24 (2022.01); G06V 10/50 (2022.01); G06V 10/761 (2022.01); G06T 2207/20081 (2013.01); G06T 2207/20192 (2013.01);
Abstract

Disclosed is an operating method of an electronic device which includes a processor and supports manufacture of a semiconductor device. The operating method includes receiving, at the processor, a layout image for the manufacture of the semiconductor device and a captured image generated by capturing the semiconductor device actually manufactured, aligning, at the processor, the layout image and the captured image based on a result of emphasizing edges and corners of the layout image and the captured image, and performing, at the processor, learning based on the aligned layout image and the aligned captured image such that a first modified layout image is generated from the layout image, and the semiconductor device is manufactured based on a second modified layout image generated from the layout image.


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