The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 11, 2025

Filed:

Mar. 18, 2022
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Pranav Vaidya, San Jose, CA (US);

Alan Menezes, San Jose, CA (US);

Siddharth Sharma, San Jose, CA (US);

Jin Ouyang, Cupertino, CA (US);

Gregory Paul Smith, Leander, TX (US);

Timothy J. Mcdonald, Austin, TX (US);

Shounak Kamalapurkar, Santa Clara, CA (US);

Abhijat Ranade, Austin, TX (US);

Thomas Melvin Ogletree, Lakeway, TX (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/34 (2006.01); G06F 1/10 (2006.01); G06F 21/60 (2013.01);
U.S. Cl.
CPC ...
G06F 11/3409 (2013.01); G06F 1/10 (2013.01); G06F 21/602 (2013.01);
Abstract

Various embodiments include a system for generating performance monitoring data in a computing system. The system includes a unit level counter with a set of counters, where each counter increments during each clock cycle in which a corresponding electronic signal is at a first state, such as a high or low logic level state. Periodically, the unit level counter transmits the counter values to a corresponding counter collection unit. The counter collection unit includes a set of counters that aggregates the values of the counters in multiple unit level counters. Based on certain trigger conditions, the counter collection unit transmits records to a reduction channel. The reduction channel includes a set of counters that aggregates the values of the counters in multiple counter collection units. Each virtual machine executing on the system can access a different corresponding reduction channel, providing secure performance metric data for each virtual machine.


Find Patent Forward Citations

Loading…