The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

May. 04, 2020
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Gregory C. Yancey, Austin, TX (US);

Rahul Gawde, Lakeway, TX (US);

Matthew Beardsworth, Austin, TX (US);

Michael A. Kost, Cedar Park, TX (US);

Junsong Li, Austin, TX (US);

Assignee:

Cirrus Logic Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/95 (2006.01); G06F 3/01 (2006.01); G06F 3/041 (2006.01); H03K 17/96 (2006.01);
U.S. Cl.
CPC ...
H03K 17/954 (2013.01); G06F 3/016 (2013.01); G06F 3/0414 (2013.01); H03K 17/96 (2013.01);
Abstract

A method may include receiving an input signal, generating a baseline signal based on the input signal, generating a corrected input signal by subtracting the baseline signal from the input signal, determining a threshold level change of the input signal when the corrected input signal exceeds a level change threshold, and responsive to the threshold level change, updating the baseline signal to the level change threshold.


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