The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

Sep. 22, 2022
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Taewoo Kwak, San Diego, CA (US);

Joseph Dale Rutkowski, Chandler, AZ (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 3/158 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H02M 1/08 (2013.01); H02M 3/1582 (2013.01); H03K 17/6871 (2013.01); H03K 2217/0063 (2013.01); H03K 2217/0072 (2013.01);
Abstract

Techniques and apparatus for driving the gate of a high-side transistor in a switched-mode power supply (SMPS) circuit, such as an inverting buck-boost converter or a buck converter. One example technique to pull down the gate voltage of the high-side transistor involves a multi-step approach, in which the gate voltage is initially discharged to a lower voltage level, and once the gate voltage falls below a certain level, an auxiliary switch can take over to completely turn off the high-side transistor. One example SMPS circuit generally includes a high-side transistor, a pulldown gate driver having an output coupled to a gate of the high-side transistor, a pulse generator having an output coupled to an input of the pulldown gate driver, and a first switch coupled between the gate and a source of the high-side transistor.


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