The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

Jun. 06, 2022
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Antonio Bellizzi, Milan, IT;

Marco Rovitto, Milan, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 24/19 (2013.01); H01L 21/4853 (2013.01); H01L 21/4871 (2013.01); H01L 21/565 (2013.01); H01L 23/3121 (2013.01); H01L 23/367 (2013.01); H01L 23/5386 (2013.01); H01L 24/20 (2013.01); H01L 2224/214 (2013.01);
Abstract

A semiconductor chip is arranged on a region of laser direct structuring (LDS) material of a laminar substrate. The semiconductor chip has a front active area facing towards, and a metallized back surface facing away from, the laminar substrate. An encapsulation of LDS material on the laminar substrate encapsulates the semiconductor chip with the metallized back surface of the semiconductor chip exposed at an outer surface of the encapsulation of LDS material. Electrically conductive lines and first vias are structured in the region of LDS material to electrically connect to the front active area of the semiconductor chip. A thermally conductive layer is plated over the outer surface of the encapsulation of LDS material in contact with the metallized back surface of the semiconductor chip. A heat extractor body of thermally conductive material is coupled in heat transfer relationship with the thermally conductive layer.


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