Memory device preventing generation of under-programmed memory cell, memory system including the same and operating method thereof

Abstract

A memory device includes a memory block, peripheral circuit, and control logic. The memory block includes a plurality of pages coupled to a plurality of word lines, respectively. The peripheral circuit is configured to perform a program loop including a program pulse operation of applying a program voltage to a selected word line, and a verify operation of applying at least one verify voltage corresponding to the program voltage to the selected word line and applying a verify pass voltage to unselected word lines. The control logic is configured to increase a level of the verify pass voltage applied to at least one unselected word line among the unselected word lines whenever the peripheral circuit performs the next program loop when threshold voltages of memory cells included in a page coupled to the selected word line are greater than a reference level.