The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2025

Filed:

Apr. 06, 2023
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventors:

Dong Uk Lee, Icheon-si Gyeonggi-do, KR;

Yun Cheol Kim, Icheon-si Gyeonggi-do, KR;

Hae Chang Yang, Icheon-si Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Icheon-si Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G11C 16/102 (2013.01); G11C 16/3495 (2013.01);
Abstract

There are provided a memory device and an operating method of the memory device. The memory device includes: a memory block including a plurality of sub-blocks; a peripheral circuit for performing first program and erase operations in a first manner in a first sub-block, among the plurality of sub-blocks, and performing second program and erase operations in a second manner in a second sub-block, among the plurality of sub-blocks; and a control circuit configured to, when a cycling number of the second program and erase operations that are performed in the second sub-block is equal to or greater than a reference number, control the peripheral circuit to perform a compensation operation that compensates for a threshold voltage of memory cells included in the first sub-block.


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