Memory devices having sense amplifiers therein that support offset cancellation having improved sense amplifier characteristics and methods of operating same

Abstract

A method of operating a memory device includes precharging a pair of true and complementary bit lines (BL/BLB) to an equivalent voltage concurrently with precharging a pair of true and complementary sense bit lines (SABL/SABLB) to the equivalent voltage, and then transferring charge associated with offset noise from BL to SABLB concurrently with transferring charge associated with the offset noise from BLB to SABL, so that a voltage difference is established between the SABL and SABLB. Next, a logic state of a memory cell connected to BI is read by transferring charge between the memory cell and BL, concurrently with equilibrating voltages on SABL and SABLB. Then, a voltage difference between SABL and SABLB is sensed and amplified in response to activating an amplifier circuit within the sense amplifier.