Hardware acceleration for motion blur with ray tracing

Abstract

Techniques are disclosed relating to ray tracing and motion blur in graphics processors. In some embodiments, ray intersection accelerator circuitry is configured to perform traversal operations for an acceleration data structure (ADS) that includes hierarchical bounding volumes, where the ADS includes a first node that specifies: first coordinates of a bounding volume at a first motion blur time and second coordinates of the bounding volume at a second motion blur time. The Ray accelerator may determine a ray time interval representation indicating upper and lower bounds that represent error bounds for a quantized ray time value of a ray. Interpolation circuitry may operate on the first coordinates, the second coordinates, and the ray time interval representation to generate interpolated coordinates for the bounding volume. Box test circuitry may determine whether the ray intersected the bounding volume based on the interpolated coordinates and coordinates of the ray.